In semiconductor processing technology, the threshold voltage of a transistor may be equal to a required bias voltage between a source region and a drain region to form a channel region. If the bias voltage between the source region and the drain region is smaller than the threshold voltage, the channel region may be unable to be formed.
The bottom portion of a gate structure of the transistor may be doped to adjust the threshold voltage, and the doping level may be a major factor for determining the threshold voltage. The doping of the bottom of the gate structure may be adjusted by an ion implantation process. The ion implantation process may be referred as a threshold-adjusting ion implantation process.
A conventional threshold-adjusting ion implantation process may be performed by doping a portion of the semiconductor substrate under the gate structure with certain type of threshold-adjusting ions to form a doping region, and a threshold voltage adjustment of the transistor may be achieved. However, the carrier mobility of the semiconductor substrate may be reduced after the threshold-adjusting ion implantation process. Compared with an intrinsic semiconductor, the scattering possibility of the carriers in the semiconductor doped by the threshold ion implantation process may be increased, thus the carrier mobility may be reduced. A higher doping concentration may result in a lower carrier mobility. The power consumption of a transistor may be increased if the carrier mobility is reduced, and a current withstand capability and a switching speed of the transistor may also be reduced.
Therefore, it may need to increase the carrier mobility of an existing transistor to improve the short channel effect while the threshold voltage is adjusted. The disclosed device structures and methods may overcome one or more problems set forth above by forming a threshold-adjusting layer.